**Assistant Professor**

**Email:** richard.m.veras@ou.edu

**Office: **Devon Energy Hall Room 210-C

__Education__

**Ph.D., Electrical and Computer Engineering
**Carnegie Mellon University

Carnegie Mellon University

The University of Texas at Austin

The University of Texas at Austin

**Research Focus**

- Research in all facets of High Performance Computing (HPC) including code synthesis for performance, parallel algorithm design; crafting libraries for computational linear algebra, signal processing, graph analytics; studying relationship between data and computer architecture, parallel hardware, accelerators, reconfigurable logic and distributed systems.

**Experience and Awards**

- Assistant Professor, University of Oklahoma
- Research Scientist, Louisiana State University
- Postdoctoral Research Associate, Carnegie Mellon University

- S. G. Krishna, A. Narasimhan, S. Radhakrishnan, R. Veras, On Large-Scale Matrix-Matrix Multiplication on Compressed Structures, IEEE Workshop on Big Data Reduction. 2021.
- R. Li, A. Rajam, R. Veras, T. M. Low, F. Rastello, P. Sadayappan. Analytical Cache Modeling and Tilesize Optimization for Tensor Contractions. Supercomputing (SC). 2019.
- F. Franchetti, T. M. Low, D. Popovici, R. Veras, D. Spampinato, J. Johnson, M. Puschel, J. Hoe, J. Moura, SPIRAL: Extreme Performance Portability. Proceedings of the IEEE. 2019.
- R. Veras, T. M. Low, T. Smith, F. Franchetti, R. van de Geijn, Automating the Last-Mile for High Performance Dense Linear Algebra. ArXiv. 2016.
- R. Veras, F. Franchetti, A Scale-Free Structure for Real-World Graphs. IEEE High Performance Extreme Computing Conference (HPEC). 2017.
- R. Veras, T. M. Low, F. Franchetti, A Scale-Free Structure for Power-Law Graphs. IEEE High Performance Extreme Computing Conference (HPEC). 2016.
- R. Veras, D. Popovici, T. M. Low, F. Franchetti, Compilers, Hands Off My Hands On Code. Workshop on Programming Models for SIMD/Vector Processing (WPMVP). 2016.
- R. Veras, F. Franchetti, Capturing the Expert: Generating Fast Matrix-Multiply Kernels with Spiral. International Workshop on Automatic Performance Tuning (iWAPT). 2014.
- T. Henretty, R. Veras, F. Franchetti, L. N. Pouchet, J. Ramanujam, P. Sadayappan, A stencil compiler for short-vector SIMD architectures. International Conference on Supercomputing (ICS). 2013.
- M. Kong, R. Veras, K. Stock, F. Franchetti, L. N. Pouchet, P. Sadayappan, When polyhedral transformations meet SIMD code generation. ACM Programming Language Design and Implementation (PLDI). 2013.
- J. Liu, B. Jaiyen, R. Veras, O. Mutlu, RAIDR: Retention-Aware Intelligent DRAM Refresh. International Symposium on Computer Architecture (ISCA). 2012.
- R. Veras, J. Monette, R. van de Geijn, Quintana-Orti, FLAMES2S: From Abstraction to High Performance. The University of Texas at Austin, Department of Computer Sciences. Technical Report TR-08-49. 2008.